The present invention relates to the structure of a pressure-contact type semiconductor device used for a power converter.
In the field of bulk power electronic devices, a snubberless GCT (Gate-Commutated Turn-off) thyristor having a maximum breaking current of 4000 A and a turn-off storage time of not more 3 xcexcs is being implemented as that substituting for a conventional GTO (Gate Turn-off) thyristor, in order to satisfy requirement for a higher withstand voltage and a higher current.
The operation principle of the GCT thyristor and its structure are disclosed in European Patent Laying-Open Gazette EP0785627A2 (Japanese Patent Laying-Open Gazette No. 9-201039), Japanese Patent Laying-Open Gazette No. 8-330572 and Mitsubishi Denki Giho Vol. 71, No. 12, pp. 61-66, for example. The characteristics thereof are summarized as follows: That is, in the GCT thyristor, the shape of a gate terminal coming into contact with a ring gate electrode and drawn out from an insulator tube is changed from a lead shape of the conventional GTO thyristor to a ring shape while connection between the GCT thyristor and a gate drive circuit is also improved from a lead wire structure of the GTO thyristor to a structure by a multilayer substrate. Thus, the inductance of the gate terminal and a gate wire is reduced to about 1/100 of the inductance of the GTO thyristor and it is possible to isotropically supply a gate current of an opposite direction fed at a turn-off time from the overall circumferential surface of the gate electrode while reduction of the turn-off storage time is also enabled. As to the wafer structure of the GCT thyristor, thousands of segments are concentrically arranged in a parallel manner in a several-stage structure and a gate electrode region forming an interface with the gate electrode is arranged on the outermost peripheral portion thereof, similarly to the wafer structure of the conventional GTO thyristor.
FIG. 3 is a longitudinal sectional view showing the structure of a conventional GCT device 1P inclusive of an external gate driver 2P for controlling the GCT device 1P. Since the GCT device 1P has a laterally symmetrical structure in relation to a central axis CAP, only the structure of one side thereof is shown in FIG. 3.
Each reference numeral in FIG. 3 denotes the following each element: That is, stack electrodes 3P are electrodes for pressurizing the GCT device 1P and taking out a current. 4P is a semiconductor substrate (wafer), and a gate electrode 4Pa of aluminum coming into contact with a gate electrode region is formed in the form of a ring on the outermost peripheral portion of its first main surface, while a plurality of cathode electrodes 4Pb are concentrically formed on the first main surface of the semiconductor substrate 4P inside the gate electrode 4Pa. 5P and 6P are a cathode distortion buffer plate and a cathode post electrode successively loaded on the cathode electrodes 4Pb of the semiconductor substrate 4P respectively, a non-illustrated anode electrode is fully formed on a second main surface (surface opposite to the first main surface) corresponding to the rear surface of the semiconductor substrate 4P, and an anode distortion buffer plate 7P and an anode post electrode 8P are successively loaded on this anode electrode. 9P is a ring gate electrode whose first surface (lower surface) comes into surface contact with the gate electrode 4Pa of the semiconductor substrate 4P, 10P is a ring-shaped gate terminal of a metal plate (which is an iron-42% nickel alloy, for example), and an inner peripheral side end portion of its inner peripheral plane part 10PI is slidably arranged on a second surface (upper surface opposed to the aforementioned first surface) of the ring gate electrode 9P. Further, an elastic body 11P such as a belleville spring or a waved spring presses the ring gate electrode 9P against the gate electrode 4Pa through an annular insulator 12P along with the aforementioned end portion of the inner peripheral plane part 10PI of the ring-shaped gate terminal 10P. Due to this pressing, the gate electrode 4Pa, the ring gate electrode 9P and the ring-shaped gate terminal 10P are electrically connected with each other. 13P is an insulating sheet for insulating the ring gate electrode 9P from the opposed cathode distortion buffer plate 5P and the cathode post electrode 6P. The ring-shaped gate terminal 10P is further formed by an intermediate part or fixed part 10PF and an outer peripheral plane part 10PO in addition to the aforementioned inner peripheral plane part 10PI, and a bent part 10Pd is provided on a portion not in surface contact with the ring gate electrode 9P in the inner peripheral plane part 10PI while a bent part 10Pa is formed also on an intermediate portion of the outer peripheral plane part 10PO.
On the other hand, 14P is an insulator tube consisting of ceramics, which is vertically divided through the intermediate part 10PA of the ring-shaped gate terminal 10P and has a projection part 14Pa. The fixed part 10PA of the ring-shaped gate terminal 10P and the insulator tube 14P are airtightly fixed to each other by braze bonding. In a portion of the outer peripheral plane part 10PO of the ring-shaped gate terminal 10P drawn outward from the outer peripheral side surface of the insulator tube 14P slightly closer to the side of the inner peripheral portion than the outer peripheral end thereof, a plurality of mounting holes 10Pb for coupling this ring-shaped gate terminal 10P to the gate driver 2P are provided at prescribed intervals toward the circumferential direction. Further, an end part 14Pbl of a first L-shaped portion bent to project outward from the upper surface of the insulator tube 14P and one end portion of a ring-shaped first flange 15P are airtightly fixed by arc welding, and an end part 14Pb2 of a second L-shaped portion projecting from the lower surface of the insulator tube 14P and one end portion of a second flange 16P are also airtightly fixed similarly by arc welding. Other end portions of the first and second flanges 15P and 16P are fixed to parts of notched portions of the cathode post electrode 6P and the anode post electrode 8P respectively. Thus, the GCT device 1P is in a structure closed against the exterior. This interior is replaced with inert gas.
Further, 17P is a plate-shaped control electrode formed by an annular metal plate arranged to be concentric with the ring-shaped gate terminal 10P, and brought into pressure contact with the cathode post electrode 6P by the stack electrode 3P. A plate-shaped control gate electrode 18P formed by an annular metal plate is arranged to be concentric with the ring-shaped gate terminal 10P similarly to the plate-shaped control electrode 17P, and electrically connected in its inner peripheral side end portion with the outer peripheral side end portion of the outer peripheral plane part 10PO of the ring-shaped gate terminal 10P. Both electrodes 17P and 18P are rendered to form a multilayer substrate through an insulating substrate 30P. Connection of both electrodes 17P and 18P to the GCT device 1P is implemented by the following members 19P and 20P: That is, 19P is an insulating sleeve for insulating the ring-shaped gate terminal 10P and the plate-shaped control gate electrode 18P from the plate-shaped control electrode 17P, 20P is a connection part formed by a bolt, a nut and the like for electrically connecting the ring-shaped gate terminal 10P and the plate-shaped control gate electrode 18P with each other between the plate-shaped control electrode 17P and the plate-shaped control gate electrode 18P through the insulating sleeve 19P, and the nut in the connection part 20P passes through a mounting hole provided in the plate-shaped control gate electrode 18P in correspondence to the mounting hole 10Pb and the mounting hole 10Pb. The plate-shaped control electrode 17P and the plate-shaped control gate electrode 18P are directly coupled to the gate driver 2P respectively.
While a larger capacity and a higher speed of a semiconductor device for power electronics have been rendered implementable due to the development of the aforementioned GCT thyristor, a much larger capacity and a much higher speed of the GCT thyristor are required. In implementation of this requirement, however, new problems shown below are arising.
That is, it is necessary to increase the number of GCT segments connected in parallel with each other, in order to attain further improvement of a breaking current. In order to satisfy this requirement, (i) it is necessary to progress increase of the diameter of the semiconductor substrate 4P, and (ii) it is necessary to maintain a uniform operation of each segment in the semiconductor substrate 4P even if such further increase of the diameter is progressed. Therefore, it is required that a structure for uniformly supplying a gate current to a total gate electrode region formed on the outermost peripheral portion of the semiconductor substrate 4P at a turn-on time while uniformly extracting a reverse gate current from the total gate electrode region at a turn-off time is implemented in response to progress of increase of the diameter of the semiconductor substrate 4P. Particularly a GCT element ensures its breaking ability by instantaneously changing the gate current to a value substantially equal to the breaking current with a gradient of several 1000 A/xcexcs, and hence the point is how uniformly to supply a signal to the gate electrode region for uniformly operating the semiconductor substrate.
In the GCT device 1P according to the conventional structure illustrated in FIG. 3, however, a mounting structure of a GCT element (corresponding to a portion excluding the multilayer substrate 17P and 18P from the GCT device 1P here) and the external gate driver 2P through the multilayer substrate 17P and 18P and dispersion of the mounting state thereof frequently result in such a situation that a uniform gate current is not supplied to the ring-shaped gate terminal 10P of the GCT element.
FIG. 4 is a plan view of the GCT device 1P typically showing this problem, and this FIG. 4 shows the multilayer substrate 17P, 18P and 30P in FIG. 3 as a multilayer substrate 21 in an integrated manner. That is, details of a longitudinal sectional view related to a break line I-II in FIG. 4 correspond to FIG. 3, and FIG. 4 merely typically shows the mounting state of the multilayer substrate 21 and the ring-shaped gate terminal 10P. As shown in this FIG. 4, current paths IP1 to a portion of mounting parts 22 of the multilayer substrate 21 and the ring-shaped gate terminal 10P located on the side of the gate driver 2P are smaller in wiring resistance thereof than current paths IP2 to the side of a mounting part 22 located on an opposite side to the gate driver 2P. Therefore, it follows that most of the gate current concentrates to the mounting parts 22 on the side of the gate driver 2P. Such a wiring structure renders supply of the gate current to the ring-shaped gate terminal 10P and extraction of the reverse gate current from the ring-shaped gate terminal 10P through the multilayer substrate 21 non-uniform. If a uniform gate current is not supplied to the ring-shaped gate terminal 10P, it follows that a uniform operation of each segment in the semiconductor substrate 4P is deteriorated and the aforementioned requirement cannot be satisfied. Such a problem arises not only at the turn-on time, but also at the turn-off time.
The present invention has been proposed in order to solved the aforementioned problems, and aims at providing a pressure-contact type semiconductor device which can attain uniform operations of elements despite increase of the diameter of a semiconductor substrate by rendering a uniform gate current suppliable to a gate terminal part formed by a multilayer substrate, a ring-shaped gate terminal, a ring gate electrode and a gate electrode.
The invention according to a first aspect is characterized in that a pressure-contact type semiconductor device comprises a discoidal semiconductor substrate having a gate electrode region arranged on its outermost peripheral portion and gate terminal means having one side coming into contact with the gate electrode region and another side elongated to an outer part for forming a path for a gate current while uniformly supplying the gate current to the gate electrode region.
The invention according to a second aspect is the pressure-contact type semiconductor device described in the aforementioned first aspect, and characterized in that the gate terminal means functions as a resistance whose resistivity is at least 0.1 mxcexa9xc2x7cm.
The invention according to a third aspect is the pressure-contact type semiconductor device described in the aforementioned second aspect, and characterized in that the gate terminal means comprises an annular gate electrode formed on a surface of the gate electrode region, a ring gate electrode of an annular body coming into contact with the gate electrode, a ring-shaped gate terminal of an annular plate having an inner peripheral side end portion coming into contact with the ring gate electrode, and a multilayer substrate having one side coming into contact with an outer peripheral side end portion of the ring-shaped gate terminal and another side elongated up to the outer part.
The invention according to a fourth aspect is the pressure-contact type semiconductor device described in the aforementioned third aspect, and characterized in that at least one of the ring-shaped gate terminal, the ring gate electrode and the gate electrode is a resistor having resistivity of at least 0.1 mxcexa9xc2x7cm.
The invention according to a fifth aspect is the pressure-contact type semiconductor device described in the aforementioned third aspect, and characterized in that the gate terminal part further comprises a ring-shaped resistor arranged between the ring-shaped gate terminal and the ring gate electrode.
The invention according to a sixth aspect is the pressure-contact type semiconductor device described in the aforementioned third aspect, and characterized in that the gate terminal part further comprises a ring-shaped resistor arranged between the gate electrode and the ring gate electrode.
The invention according to a seventh aspect is the pressure-contact type semiconductor device described in the aforementioned third aspect, and characterized in that the gate terminal part further comprises a resistor arranged between the outer peripheral side end portion of the ring-shaped gate terminal and a part of the multilayer substrate coming into contact with the outer peripheral side end portion.
The invention according to an eighth aspect is the pressure-contact type semiconductor device described in the aforementioned third aspect, and characterized in that at least one of the ring-shaped gate terminal, the ring gate electrode and the gate electrode is coated with a resistor film.
The invention according to a ninth aspect is characterized in that a pressure-contact type semiconductor device comprises a discoidal semiconductor substrate having a gate electrode region arranged on its outermost peripheral portion, and a gate terminal part having one side coming into contact with the gate electrode region and another side elongated to an outer part for forming a path for a gate current and arranged for uniformly supplying the gate current to the gate electrode region.
The invention according to a tenth aspect is the pressure-contact type semiconductor device described in the aforementioned ninth aspect, and characterized in that the gate terminal part comprises a resistor whose resistivity is at least 0.1 mxcexa9xc2x7cm.
The invention according to an eleventh aspect is the pressure-contact type semiconductor device described in the aforementioned tenth aspect, and characterized in that the gate terminal part comprises an annular gate electrode formed on a surface of the gate electrode region, a ring gate electrode of an annular body coming into contact with the gate electrode, a ring-shaped gate terminal of an annular plate having an inner peripheral side end portion coming into contact with the ring gate electrode, and a multilayer substrate having one side coming into contact with an outer peripheral side end portion of the ring-shaped gate terminal and another side elongated up to the outer part, and at least one of the ring-shaped gate terminal, the ring gate electrode and the gate electrode is the resistor.
The invention according to a twelfth aspect is the pressure-contact type semiconductor device described in the aforementioned ninth aspect, and characterized in that the gate terminal part comprises an annular gate electrode formed on a surface of the gate electrode region, a ring-shaped resistor coming into contact with the gate electrode, a ring gate electrode of an annular body coming into contact with the resistor, a ring-shaped gate terminal of an annular plate having an inner peripheral side end portion coming into contact with the ring gate electrode, and a multilayer substrate having one side coming into contact with an outer peripheral side end portion of the ring-shaped gate terminal and another side elongated up to the outer part.
The invention according to a thirteenth aspect is the pressure-contact type semiconductor device described in the aforementioned ninth aspect, and characterized in that the gate terminal part comprises an annular gate electrode formed on a surface of the gate electrode region, a ring gate electrode of an annular body coming into contact with the gate electrode, a ring-shaped resistor coming into contact with the ring gate electrode, a ring-shaped gate terminal of an annular plate having an inner peripheral side end portion coming into contact with the resistor, and a multilayer substrate having one side coming into contact with an outer peripheral side end portion of the ring-shaped gate terminal and another side elongated up to the outer part.
The invention according to a fourteenth aspect is the pressure-contact type semiconductor device described in the aforementioned ninth aspect, and characterized in that the gate terminal part comprises an annular gate electrode formed on a surface of the gate electrode region, a ring gate electrode of an annular body coming into contact with the gate electrode, a ring-shaped gate terminal of an annular plate having an inner peripheral side end portion coming into contact with the ring gate electrode, a resistor coming into contact with an outer peripheral side end portion of the ring-shaped gate terminal, and a multilayer substrate having one side coming into contact with the resistor and another side elongated up to the outer part.
The invention according to a fifteenth aspect is the pressure-contact type semiconductor device described in the aforementioned ninth aspect, and characterized in that the gate terminal part comprises an annular gate electrode formed on a surface of the gate electrode region, a ring gate electrode of an annular body coming into contact with the gate electrode, a ring-shaped gate terminal of an annular plate having an inner peripheral side end portion coming into contact with the ring gate electrode, and a multilayer substrate having one side coming into contact with the outer peripheral side end portion of the ring-shaped and another side elongated up to the outer part, and at least one of the ring-shaped gate terminal, the ring gate electrode and the gate electrode is coated with a resistor film.
The invention according to a sixteenth aspect is characterized in that a pressure-contact type semiconductor device comprises a discoidal semiconductor substrate having an annular gate electrode formed on its surface, a ring gate electrode of an annular body coming into contact with the gate electrode, and a ring-shaped gate terminal of an annular plate having an inner peripheral side end portion coming into contact with the ring gate electrode, and the ring-shaped gate terminal is a resistor having resistivity of at least 0.1 xcexa9xc2x7cm.
According to the semiconductor device in each of the first to sixteenth aspects of the present invention, the resistor functional as a resistance is arranged on the path reaching the gate electrode from the multilayer substrate through the ring-shaped gate terminal and the ring gate electrode, whereby a voltage drop in the resistor located on a part where the gate current concentrates enlarges and the gate current hardly flows on the part if a uniform gate current is not supplied, and the gate current is consequently shunted to another part where the quantity of the gate current is small. Therefore, the present invention enables supply of a substantially uniform gate current to the semiconductor substrate and can implement prevention of occurrence of a non-uniform operation. Similarly, the present invention can also uniformalize extraction of a reverse gate current.
Objects, features, aspects and advantages of the present invention are now described in detail inclusive of the aforementioned ones as well as other ones with the accompanying drawings.